The present invention relates to a bias circuit for a transistor and, more particularly, to a bias circuit which has means for compensating for deviations in the threshold voltage of a field effect transistor (FET).
A prior art bias circuit for an FET comprises a voltage dividing resistor which applies a gate bias to the FET. The problem with this type of bias circuit is that the voltage dividing resistor does not compensate for a deviation of the threshold voltage V.sub.T of the FET.
Another prior art bias circuit for an FET is disclosed in the paper entitled "Broadband GaAs Monolithic Amplifier" and presented by Onoda et al at the 1984 National Meeting of the Institute of Electronics and Communication Engineers of Japan, April 1984. The bias circuit proposed by Onoda et al is constructed to shift the operating point of an FET by a use of a negative feedback circuit so that a deviation of the threshold value V.sub.T may be compensated for. However, the compensation attainable with such a bias circuit is not satisfactory.